Method for manufacturing partial SOI substrates

Details Method for manufacturing partial SOI substrates Method for manufacturing partial SOI substrates

2007-09-04

2007-09-04

Le, Thao P. (Department: 2818)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

On insulating substrate or layer

C257S347000, C257SE27112, C257SE21320, C257SE21545, C257SE21561, C257SE21564, C438S424000

Reexamination Certificate

active

11168914

ABSTRACT:
There is closed a semiconductor device which comprises a semiconductor substrate including an SOI region where a first insulating film is buried, and a non-SOI region, the semiconductor substrate being provided with a boundary region formed between the SOI region and the non-SOI region and having a second insulating film buried therein, the second insulating film being inclined upward from the SOI region side toward the non-SOI region side, the second insulating film having a thickness smaller than the thickness of the first insulating film and being tapered from the SOI region side to the non-SOI region side, a pair of element isolating insulating regions separately formed in the non-SOI region of semiconductor substrate and defining element regions, a pair of impurity diffusion regions formed in the element regions, and a gate electrode formed via a gate insulating film in the element region of the semiconductor substrate.

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Japanese Office Action mailed by the Japanese Patent Office on Dec. 5, 2006 in counterpart Japanese Application No. 2003-283479.

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