Method for manufacturing multi-layer package substrates

Details Method for manufacturing multi-layer package substrates Method for manufacturing multi-layer package substrates

2002-05-20

2004-06-01

Pham, Long (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S108000, C438S109000, C438S110000

Reexamination Certificate

active

06743659

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to a method for manufacturing multi-layer package substrates and particularly to a method for producing package soft substrates through Roll to Roll, Reel to Reel, or Panel to Panel approaches.
BACKGROUND OF THE INVENTION
Printed circuit boards are composite material substrates coated with single layer or multi-layer circuits. Their main function is to provide support and connections between electronic circuit components such as capacitors, resistors and the like, which are built and assembled on a first layer to construct components for selected functions. Printed circuit boards, depending on the number of circuit layers, can be classified as single-sided, double-sided and multi-sided printed circuit boards. Classified by structural materials, they may be divided into hard substrates and soft substrates. As integrated circuit designs and manufacturing techniques have evolved to encompass deep sub-micron engineering, and computers and other electronic devices have followed a trend towards miniaturization, conventional hard substrates used in integrated circuit packages have become obsolete. They have been replaced by soft substrate PACKAGES in Roll to Roll, Reel to Reel, or Panel to Panel methods.
The soft substrates have flexible characteristics. According to the structural characteristics of conductive line circuits, the soft substrates can be categorized as single-sided, double-sided, single-access, double-access, rigid-flex, and rigidized types.
As previously discussed, the soft substrates made through Roll to Roll or Reel to Reel methods have only one or two layers of circuit layer patterns for use as conductive layers. Although they can meet the requirements of high density and fine line circuits (such as line width and line interval down to 25 microns and output end/input end ranging from 400 to 800 microns), for applications in encased chip packages and high performance output/input, it is necessary to allocate a ground conductive element to avoid high frequency interference and noise. As a result, the effective area for circuit configurations is greatly reduced. Taking into account electric characteristics, the difficulty of circuit configuration for conductive layers that use conventional double-sided circuit layer patterns increases significantly. Hence, the use of multi-layer circuit patterns for conductive layers on soft substrates becomes an unavoidable trend in the development of encased chip packaging.
SUMMARY OF THE INVENTION
The primary object of the invention is to provide a method for the manufacturing of multi-layer package substrates.
Another object of the invention is to provide a method for producing package soft substrates using Roll to Roll, Reel to Reel, or Panel to Panel approaches.
The method for manufacturing multi-layer package substrates according to the invention first provides a substrate having a first side and a second side that are respectively bonded to a release layer. Then the substrate bonded to the release layers is drilled to form a plurality of through holes. Then the through holes are plugged with conductive materials. The release layers are then removed, and a first copper film is formed respectively on the first side and second side of the substrate. After this process, the first copper films are processed through photolithography and etching operations to form first circuit layer patterns on the first and second side of the substrate. Thereafter, the first side and second side of the substrate are respectively coated with an build-up layer, and the build-up layers are drilled by means of a laser to form counter vias on the first side and second side of the substrate. A copper film is formed on the inner surface of the counter vias, and second circuit layer patterns are formed on the first side and second side of the substrate. Finally, a contact pad is formed on the first and second side of the substrate.
In a first embodiment of the invention, the method for forming the second circuit layer patterns is: first, plate the first and second side of the substrate to form a copper layer. Then form a photo resistant layer on the first side and second side of the substrate, and form photo resistant patterns through photolithography processes. Then, plate the first and second layer of the substrate to form a second copper film among the photo resistant patterns, and fill the counter vias. Then, remove the photo resistant patterns, and etch the second copper film to form the second circuit layer pattern.
In a second embodiment of the invention, the method for forming the second circuit layer patterns is: first, plate the first and second side of the substrate to form a second copper film. Then, form a photo resistant layer on the first side and second side of the substrate, and form photo resistant patterns through photolithography processes. Then, etch the second copper film to form the second circuit layer pattern. Finally, the photo resistant patterns are removed.
In a third embodiment of the invention, the method for forming the second circuit layer patterns is: first, form a conductive bonding layer on the first side and second side of the substrate to fill the counter vias. Then, remove bulged objects on the conductive bonding layer by grinding. Then, remove the second release film. Then, plate the first side and second side of the substrate to form a second copper film. Then, form photo resistant patterns through photolithography processes. The second circuit layer patterns are formed through etching processes. Finally, remove the photo resistant patterns.
The foregoing, as well as additional objects, features and advantages of the invention will be more readily apparent from the following detailed description, which is explained with reference to the accompanying drawings.


REFERENCES:
patent: 5866441 (1999-02-01), Pace
patent: 6544815 (2003-04-01), Isaak
patent: 2002/0137255 (2002-09-01), Wang et al.
patent: 2002/0146863 (2002-10-01), Lin et al.

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