Method for manufacturing ISRC MOSFET

Fishing – trapping – and vermin destroying

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437 41, 437 45, 437 69, 148DIG82, H01L 21265

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active

057473560

ABSTRACT:
The present invention privides a method for manufacturing an ISRC MOSFET, comprising steps of forming an isolating layer through the LOCOS process, depositing a mask oxide layer, exposing only the part of silicon substrate for forming the channel and shallow junction of source/drain layers, depositing the first nitride layer over the resultant substrate, dry-etching the first nitride layer to form a nitride side-wall, forming an oxide layer being recessed into the channel, wet-etching the nitride side-wall, forming two doped layers for the shallow source/drain by an N.sup.+ or P.sup.+ ion-implantation, depositing the second nitride layer, dry-etching for forming a nitride side-wall, forming a P.sup.- or N.sup.- doped layer between the two doped layers, forming a gate oxide layer on the P.sup.- or N.sup.- doped layer, depositing a poly-silicon layer, forming a poly-silicon gate by a llithography process and a dry-etching process, etching away the mask oxide layer, and ion-implanting for thick source/drain junction.

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patent: 5434093 (1995-07-01), Chau et al.
patent: 5464782 (1995-11-01), Koh
patent: 5472897 (1995-12-01), Hsu et al.
patent: 5534447 (1996-07-01), Hong
patent: 5538913 (1996-07-01), Hong

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