Semiconductor device manufacturing: process – With measuring or testing – Optical characteristic sensed
Reexamination Certificate
2006-12-21
2010-12-21
Garber, Charles D (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
Optical characteristic sensed
C438S014000, C438S460000, C257SE21521
Reexamination Certificate
active
07855088
ABSTRACT:
The invention provides a method for manufacturing an integrated circuit. The method, in one embodiment, includes inspecting a semiconductor wafer including a plurality of die for a defect, the inspecting providing an image of the semiconductor wafer including the defect. The method further includes identifying an area of the semiconductor wafer from the image, wherein the identified area encompasses at least those die including any portion of the defect, and dicing the semiconductor wafer into individual die. The die defined by the identified area, in this embodiment, are then discarded.
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English machine translation of Jaoanese patent JP2003046220A, Method and Device for Inspecting Substrate and Method of Manufacturing Substrate, Feb. 14, 2003.
Akomer Errol P.
Bright James
Flessner Kyle
Nikpour Mohammad
Tervooren Jason
Brady III Wade J.
Franz Warren L.
Garber Charles D
Roman Angel
Telecky , Jr. Frederick J.
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