Fishing – trapping – and vermin destroying
Patent
1988-06-24
1990-06-05
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 46, 437 47, 437 49, 437 50, 437 59, 437 60, 357 43, H01L 21265
Patent
active
049314076
ABSTRACT:
A method for manufacturing MOS and bipolar transistors is proposed which includes MOS and bipolar transistors. The method comprises implanting impurity ions in a channel formation region with a dummy gate insulating film interposed and, subsequent to forming a gate oxide film on the surface of the resultant structure, impurity ions are implanted into an internal base region of the bipolar transistor.
REFERENCES:
patent: 4637125 (1987-01-01), Iwasaki et al.
patent: 4717686 (1988-01-01), Jacobs et al.
patent: 4721686 (1988-01-01), Contiero et al.
patent: 4727046 (1988-02-01), Tuntasood et al.
patent: 4764482 (1988-08-01), Hsu
Maeda Takeo
Makita Koji
Chaudhuri Olik
Kabushiki Kaisha Toshiba
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