Fishing – trapping – and vermin destroying
Patent
1997-03-04
1998-04-07
Tsai, Jey
Fishing, trapping, and vermin destroying
437 45, 437 56, 437 52, H01L 21265
Patent
active
057364150
ABSTRACT:
A method for manufacturing input/output port devices of a semiconductor circuit having low body effect, suitable for use on a semiconductor substrate on which a plurality of pull-up device regions and pull-down device regions are formed. First, when executing a channel implantation, an anti-punchthrough implantation, and a threshold adjustment implantation, a mask which masks PMOS devices in the CMOS process is used to mask pull-up device regions on a semiconductor substrate. Furthermore, when executing a cell implantation, a mask which masks the outside regions of memory cells is used to mask pull-down device regions. In the invention, the body effect of pull-up devices on the input/output port is reduced without using any extra mask and under the original process, thereby lowering the threshold voltage and reducing the output voltage drop.
REFERENCES:
patent: 5005477 (1991-04-01), Farb
patent: 5011784 (1991-04-01), Ratnakumar
patent: 5141890 (1992-08-01), Haken
Chang Ming-Chien
Laih Wuu-Larng
Tsai Jey
Vanguard International Semiconductor Corporation
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