Method for manufacturing high voltage field-effect transistors

Metal treatment – Process of modifying or maintaining internal physical... – Chemical-heat removing or burning of metal

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148187, H01L 734

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active

039665151

ABSTRACT:
A method of manufacturing field-effect transistors is disclosed which includes the steps of growing an epitaxial layer on a substrate wafer, forming channels of the desired conductivity on the wafer, forming the gate electrodes on the wafer and then forming source and drain electrodes on the wafer. The gate electrodes are formed by first masking the gate electrode area and performing a first boron deposition and boron diffusion step. A second boron deposition and diffusion step is then provided to enable the resultant field-effect transistor to operate at higher voltages.

REFERENCES:
patent: 3560278 (1971-02-01), Sanera
patent: 3676231 (1972-07-01), Medvecky et al.
patent: 3775197 (1973-11-01), Sahagun

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