Method for manufacturing high-breakdown voltage semiconductor de

Fishing – trapping – and vermin destroying

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

437147, 437151, H01L 21385, H01L 21425

Patent

active

047804262

ABSTRACT:
A first silicon oxide film is formed on the major surface of an n-type silicon substrate. A silicon nitride film is formed on the first silicon oxide film. The first silicon oxide film and the silicon nitride film are selectively etched to form an opening. Boron ions are implanted into the silicon substrate using the first silicon oxide film and the silicon nitride film as a mask. A second silicon oxide film is formed on the silicon substrate exposed by the opening. Gallium ions are implanted into the second silicon oxide film using the silicon nitride film as a mask. Boron and gallium ions are simultaneously diffused in the silicon substrate. In this case, a diffusion rate of gallium in the silicon substrate is higher than that of boron in the silicon substrate, and the diffusion rate of gallium in the silicon oxide film is higher than that in the silicon substrate. Therefore, a p-type second layer is formed in the substrate to surround a p.sup.+ -type first layer in a self-aligned manner.

REFERENCES:
patent: 3833429 (1974-09-01), Momma et al.
patent: 3834953 (1974-09-01), Nakamura et al.
patent: 3895976 (1975-07-01), Dumas
patent: 4060427 (1977-11-01), Barile et al.
patent: 4351894 (1982-09-01), Yonezawa et al.
patent: 4426234 (1984-01-01), Ohshima et al.
Temple, "Junction Termination Extension (JTE), A New Technique for Increasing Avalanche Breakdown Voltage and Controlling Surface Electric Fields in P-N Junctions," IEDM 77, pp. 423-426.
Selim, "High-Voltage, Large-Area Planar Devices," IEEE Electron Device Letters, vol. EDL-2, No. 9, pp. 219+221, Sep. 1981.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for manufacturing high-breakdown voltage semiconductor de does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing high-breakdown voltage semiconductor de, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing high-breakdown voltage semiconductor de will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2269434

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.