Method for manufacturing field emitter arrays

Fishing – trapping – and vermin destroying

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437228, 437916, H01L 21465

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active

056887078

ABSTRACT:
The present invention provides a method for manufacturing field emitter arrays, comprising steps of forming a n.sup.+ -layer in a polycrystalline or amorphous silicon layer deposited on an insulating substrate, making an oxide layer disk pattern on said silicon layer, etching said silicon layer isotropically, forming a silicon oxide layer on the upper part of said silicon layer by means of the first oxidation, which results in field emitter tips, making hollows, depositing a silicon nitride layer with a predetermined thickness on said silicon oxide layer, removing said silicon nitride layer except that of the side-wall parts around said field emitter tips, forming a gate insulating layer by means of the second oxidation, removing said silicon nitride layer of said sidewall parts around said tips, making contact window, and forming gate electrodes and cathode contacts by depositing gate metal on said gate insulating layers. According to the present invention, field emitter arrays can be formed uniformly over a large area with pixels insulated therebetween.

REFERENCES:
patent: 5266530 (1993-11-01), Bagley et al.
patent: 5455196 (1995-10-01), Frazier
patent: 5532177 (1996-07-01), Cathey
Uh, et al., "New fabrication method of silicon field emitter arrays using thermal oxidation", J. Vac. Sci. Technol. B 13(2), Mar./Apr. 1995, pp. 456-460.
Uh, et al., "Fabrication and Characterization of Gated n+ Polycrystalline Silicon Field Emitter Arrays", 9th International Vacuum Microelectronics Conference, St. Petersburg 1996, pp. 419-422.

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