Method for manufacturing field emitter array

Fishing – trapping – and vermin destroying

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437228, 437950, H01L 21266

Patent

active

054200547

ABSTRACT:
An FEA having a novel structure using an n.sup.+ shallow junction region, which operates with small voltages and increases emission current and a method for manufacturing the same. A tip is formed on a first conductive type semiconductor substrate, a first impurity region having a high impurity concentration is formed in the upper portion of the semiconductor substrate wherein first conductive type impurities are implanted, and a second conductive type second impurity region is formed in the surface of the semiconductor substrate around the tip and on the first impurity region. Also, a second conductive type shallow junction region is formed in the surface portion of the tip, an insulation layer including a pin hole which exposes the tip is formed on the semiconductor substrate, and a conductive layer having an opening corresponding to the pin hole of the insulation layer is formed on the insulation layer. When electrons are emitted by a tunneling effect, the required voltages to be applied are lowered. Since the tip can be manufactured by a self-aligned manner, the manufacturing process becomes simplified.

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Jung Y. EA, et al., Silicon Avalanche Cathodes and Their Characteristics, Oct. 1991, vol. 38 pp. 2377-2382.

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