Electric lamp or space discharge component or device manufacturi – Process – With assembly or disassembly
Reexamination Certificate
2001-01-05
2003-10-14
Ramsey, Kenneth J. (Department: 2879)
Electric lamp or space discharge component or device manufacturi
Process
With assembly or disassembly
Reexamination Certificate
active
06632114
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a field emission device (FED) which is capable of focusing an electron beam on an anode, and ensures stable operation with high anode voltages, and a method for fabricating the FED.
2. Description of the Related Art
An FED panel with a conventional FED is illustrated in
FIG. 1. A
cathode
2
is formed over a substrate
1
with a metal such as chromium (Cr), and a resistor layer
3
is formed over the cathode
2
with an amorphous silicon. A gate insulation layer
4
with a well
4
a,
through which the bottom of the resistor layer
3
is exposed, is formed on the resistor layer
3
with an insulation material such as SiO
2
. A micro-tip
5
formed of a metal such as molybdenum (Mo) is located in the well
4
a.
A gate electrode
6
with a gate
6
a
aligned with the well
4
a
is formed on the gate insulation layer
4
. An anode
7
is located a predetermined distance above the gate electrode
6
. The gate electrode
7
is formed on the inner surface of a faceplate
9
that forms a vacuum cavity in associated with the substrate
1
. The faceplate
8
and the substrate
1
are spaced apart from each other by a spacer (not shown), and sealed at the edges. As for color displays, a phosphor screen (not shown) is placed on or near the anode
7
.
Since a high-voltage electrical field is created around micro-tips in such FEDS, there is the risk of electrical arcing events. Although the cause of electrical arcing is not clearly identified, discharging caused by a sudden large amount of outgassing seems to cause the electrical arcing. According to an experiment result, such arcing occurs with application of an anode voltage as high as 1 kV for both a FED placed within a high-level vacuum chamber without a faceplate, or as a FED vacuum-sealed with a faceplate, as shown in FIG.
1
. According to a result of optical microscopy, damage caused by the arcing is mostly detected at the edges of the gate
6
a
of the gate electrode
6
. This is considered to be caused by a strong electric field created near such sharp edges of the gate
6
a.
An electrical short occurs between the anode
7
and the gate electrode
76
due to the arcing. As a result, a high-anode voltage is applied to the gate electrode
6
, thereby damaging the gate insulation layer
4
below the gate electrode
6
, and the resistor layer
3
exposed through the well
4
a.
This damage becomes serious as the anode voltage level increases.
Therefore, the simple configuration of the conventional FED, in which the cathode and anode are spaced apart from each other by just spacers, is not enough to ensure a reliable FED operable with high voltages. The brightness of FED panel depends on the anode voltage level. Thus, a high-brightness FED cannot be manufactured using the conventional FED. The conventional FED cannot focus an electron beam emitted by the micro-tips on the anode, so that it is difficult to achieve a high-resolution display. In addition, a color display with high-color purity cannot be implemented by such a FED.
SUMMARY OF THE INVENTION
To solve the above problems, it is an object of the present invention to provide a field emission display (FED) which ensures stable operation with high anode voltages, and a method for fabricating the FED.
It is another object of the present invention to provide an FED with high-resolution, and with high-color purity for color displays, and a method for fabricating the FED.
According to an aspect of the present invention, there is provided a field emission device (FED) comprising: a substrate; a cathode formed over the substrate; micro-tips having nano-sized surface features, formed on the cathode; a gate insulation layer with wells each of which a single micro-tip is located in, the gate insulation layer formed over the substrate; a gate electrode with gates aligned with the wells such that each of the micro-tips is exposed through a corresponding gate, the gate electrode formed on the gate insulation layer; a focus gate insulation layer having openings each of which one or more gates correspond to, the focus gate Insulation layer formed on the gate electrode; and a focus gate electrode with focus gates aligned with the openings of the focus gate insulation layer, the focus gate electrode formed on the focus gate insulation layer.
It is preferable that a resistor layer is formed over or beneath the cathode, or a resistor layers is formed over and beneath the cathode in the FED.
According to another aspect of the present invention, there is provided a method for fabricating a field emission device (FED), comprising: forming a cathode, a gate insulation layer with wells, and a gate electrode with gates on a substrate in sequence, and forming micro-tips on the cathode exposed by the wells; forming a focus gate insulation layer on the gate electrode to have a predetermined thickness with a carbonaceous polymer layer, such that the wells having the micro-tips are filled with the carbonaceous polymer layer: forming a focus gate electrode on the focus gate electrode; forming a predetermined photoresist pattern on the focus gate electrode; etching the focus gate electrode into a focus gate electrode pattern using the photoresist pattern as an etch mask; etching the focus gate insulation layer exposed through the focus gate electrode pattern by plasma etching using O
2
, or a gas mixture containing O
2
for the focus gate insulation layer and a gas for the micro-tips as a reaction gas, thereby resulting in wells in the focus gate gas insulation layer; etching the carbonaceous polymer layer within the wells of the gate insulation layer by plasma etching using O
2
, or a gas mixture containing O
2
for the focus gate insulation layer and a gas for the micro-tips as a reaction gas, such that the carbonaceous polymer layer partially remains on the surface of the micro-tips; and etching the surface of the micro-tips by plasma etching using the carbonaceous polymer layer remaining on the micro-tips as an etch mask, and etching the carbonaceous polymer layer itself, using the reaction gas, thereby resulting in micro-tips with nano-sized surface features.
It is preferable that the carbonaceous polymer layer is formed of polyimide or photoresist. The carbonaceous polymer layer may be etched by reactive ion etching (REI). The nano-sized surface features of the micro-tips can be adjusted by varying the etch rates of the carbonaceous polymer layer and the micro-tips. It is preferable that the etch rates are adjusted by varying the oxygen-to-the gas for the micro-chips in the reaction gas, plasma power, or plasma pressure during the etching processes.
Preferable, the micro-tips are formed of at least one selected from the group molybdenum (Mo), tungsten (W), silicon (Si) and diamond. The reaction gas may be a gas mixture of O
2
and fluorine-based gas, such CF
4
/O
2
, SF
6
/O
2
, CHF
3
/O
2
, CF
4
/SF
6
/O
2
, CF
4
/CHF
3
/O
2
, or SF
6
/CHF
3
/O
2
. Alternatively, the reaction gas may be a gas mixture of O
2
and chlorine-based gas, such Cl
2
/O
2
, CCl
4
/O
2
, or Cl
2
/CCl
4
/O
2
.
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Cha Seung-nam
Choi Jun-hee
Lee Hang-woo
Burns Doane , Swecker, Mathis LLP
Ramsey Kenneth J.
Samsung SDI & Co., Ltd.
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