Method for manufacturing even dielectric layer

Details Method for manufacturing even dielectric layer Method for manufacturing even dielectric layer

1999-06-06

2001-03-13

Powell, William (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C216S038000, C216S088000, C438S745000, C438S756000

Reexamination Certificate

active

06200897

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method for manufacturing a semiconductor device. More particularly, the present invention relates to a method for manufacturing an even dielectric layer over a relief surface.
2. Description of Related Art
Chemical-mechanical polishing (CMP) is currently the only process that can provide global planarization in very large scale integration (VLSI) and ultra-large scale integration (ULSI).
In the process of forming a dielectric layer, the dielectric layer possesses a relief surface due to the relief of the underlayer interconnect layer or the underlayer dielectric layer. After the CMP is performed, several recesses are formed in the dielectric layer with a depth about 2000 angstroms, which is called a dishing effect. Because of the dishing effect, the scumming effect will occur in the subsequently performed photolithography process or the bridging effect will occur in subsequently formed devices. Therefore, leakage and shorts occur and the electrical efficacy is decreased. To improve the dishing induced by CMP, many methods have been developed, such as reverse mask technique and dummy pattern technique. But these methods all require an increase in photolithography and etching steps. Hence, the cost is increased.
SUMMARY OF THE INVENTION
The invention provides an even dielectric layer. A substrate having a patterned conductive layer formed thereon is provided. A first dielectric layer with a relatively high dopant dosage is formed on the substrate and the patterned conductive layer. A second dielectric layer with a relatively low dopant dosage is formed on the first dielectric layer. A chemical-mechanical polishing process is formed.
The invention provides an even dielectric layer. A substrate having a patterned conductive layer formed thereon is provided. A gradient-doped dielectric layer is formed on the substrate and the patterned conductive layer. A chemical-mechanical polishing process is performed.
As embodied and broadly described herein, the invention provides a method for manufacturing an even dielectric layer. Since the polishing rate of the first dielectric layer is higher than that of the second dielectric layer, the recess due to the under layer patterned conductive layer gradually disappears during the CMP process. Hence, the problem caused by the dishing effect, the scumming effect and the bridging effect can be overcome.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5449314 (1995-09-01), Meikle et al.
patent: 5502007 (1996-03-01), Murase
patent: 5516729 (1996-05-01), Dawson et al.
patent: 5560802 (1996-10-01), Chisholm

Affiliated with

Also associated with

Rating

Method for manufacturing even dielectric layer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing even dielectric layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing even dielectric layer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2527297