Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2005-05-27
2010-02-16
Wilczewski, M. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C438S960000, C029S830000, C029S847000, C156S089120
Reexamination Certificate
active
07663225
ABSTRACT:
In a manufacturing process of electronic components which include conductive patterns laminated with insulating layers provided therebetween, conductive pattern layers having conductive patterns formed at intervals therebetween along layer surfaces and insulating layers are alternately laminated to each other. The laminate is pressed by applying a force thereto in the lamination direction, followed by cutting of the laminate along cutting lines provided along boundaries between the electronic components, so that the electronic components are separated from each other. In a cutting-removal region of a mother substrate from which the electronic components are separated from each other by cutting, removal dummy patterns having a size allowing it to be disposed within the above region are formed. In the electronic component, floating dummy patterns which are not electrically connected to the conductive patterns are formed at intervals from the cutting-removal region.
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Machine Translation of JP 2000012377 A attached.
Official communication issued in the Korean Application No. 10 2006 7014638, mailed on Jul. 24, 2007.
International Search Report issued in the corresponding International Application No. PCT/JP2005/009779, mailed on Aug. 9, 2005.
Official communication issued in counterpart Chinese Application No. 200580003768.3, mailed on Jun. 5, 2009.
Kudo Kazuhide
Matsunaga Minoru
Keating & Bennett LLP
Murata Manufacturing Co. Ltd.
Wilczewski M.
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