Method for manufacturing electrical solid state devices utilizin

Details Method for manufacturing electrical solid state devices utilizin Method for manufacturing electrical solid state devices utilizin

1976-09-27

1978-04-18

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

29578, 29579, 148187, 148188, 148190, 156643, 156644, 156655, 156657, 156659, 156662, 357 23, 357 91, H01L 21265, H01L 2131

Patent

active

040849872

ABSTRACT:
The present invention describes the manufacture of a chip having a stratum in which a number of diffusions are spaced from each other by boundaries whose widths is the width of a gap. The diffusion on one side of a boundary is formed by ion bombardment, and that on the other side by heat transfer of ions of a material with which the film has been doped.

REFERENCES:
patent: 3523042 (1970-08-01), Bower et al.
patent: 3537925 (1970-11-01), Chen
patent: 3676230 (1972-07-01), Rice
patent: 3758943 (1973-09-01), Shibata
patent: 3866310 (1975-02-01), Driver et al.
patent: 3940288 (1976-02-01), Takagi et al.
patent: 3964156 (1976-06-01), Williams et al.
patent: 3972756 (1976-08-01), Nagase et al.
patent: 3980508 (1976-09-01), Takamiya et al.
Carlsen, G.S., "Multiple Division for Integrated . . . Diffusion", I.B.M. Tech. Discl. Bull., vol. 9, No. 10, Mar. 1967, pp. 1456-1457.

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