Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
1999-10-28
2002-12-17
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C430S321000, C430S323000, C430S296000, C216S024000
Reexamination Certificate
active
06495384
ABSTRACT:
DETAILED DESCRIPTION OF THE INVENTION
Field of the Invention
The present invention relates to a method for manufacturing a diffraction grating and a method for manufacturing a distributed feedback type semiconductor laser.
BACKGROUND OF THE INVENTION
Adopted as a method for manufacturing a diffraction grating on a semiconductor substrate is forming a pattern directly on a resist via a direct patterning by means of the interference exposure or exposure via electric charge particles such as electrons and ions or forming a pattern on a resist by transferring the pattern formed on a mask. Among other things, the direct patterning method via the electron beam exposure enables forming of the precise, flexible and minute cycle-controlled diffraction grating which results in being excellent in manufacturing a distributed feedback semiconductor laser compared to a method for exposure via the interference exposure or a mask, but said method is inferior to the conventional method in terms of the throughput. To eliminate the disadvantage as described above, adopted is a method wherein when forming a diffraction grating by forming exposed patterns on a semiconductor substrate via an electron beam exposure, said diffraction grating is not formed on an entire surface of said substrate but the electron beam patterning line
1
is locally formed thereon by scanning and exposing electron beams to a region
20
to be the active region and the adjacent thereto only as shown in FIG.
1
. This improves the throughput by locally forming the diffraction grating on the desired position of the substrate
4
. The exposed patterns in this process are shown in FIG.
2
.
However, if a diffraction grating is formed by the method shown in FIG.
1
and
FIG. 2
, the average height of a n-InP-substrate
4
in a diffraction grating forming region
5
is different from that of the non-diffraction grating
5
a
. This causes a stair difference on an epitaxial growth layer at the interface portion
5
b
between the diffraction grating forming region
5
and the non-diffraction grating forming region
5
a
if semiconductor layers, e.g. a n-InGaAsP guide layer
8
, a n-InP spacer layer
9
, a n-InGaAsP SCH layer
10
, a strained multiquantum well (hereinafter referred to as “strained MQW”) active layer
11
, an InGaAsP SCH layer
12
and p-InP clad layer
13
are formed in their order on the n-InP-substrate
4
locally forming the diffraction grating in the (100) plane orientation. This stair difference portion causes the crystal growth plane direction to be a high dimensional plane displaced from the (100) plane. The crystal growth rate is thus accelerated and the material gas consumption is increased at the interface portion
5
b
between he diffraction grating forming region
5
and the non-diffraction grating forming region
5
a
. This provides an advantage to have the material gas density diluted at the adjacent interface portion and causes the crystal growth rate to be decreased. This also causes the composition of the diffraction grating to be fluctuated and the crystallinity of the growth layer is deteriorated due to the distorted stress resulted from the unaligned diffraction grating, the photo-luminescence half-width thus being increased as shown in FIG.
4
. This crystallinity deterioration is resulted from that it is greatly deteriorated at the interface portion
5
b
and worsened at the center portion of the diffraction grating forming region
5
compared to that of the planar portion.
A great material gas density fluctuation at the interface portion
5
b
has an effect on the center portion of the diffraction grating
5
which results in having the crystal quality deteriorated compared to that of the planar growth portion. Thus, this deteriorates the quality of the active layer portion of a semiconductor laser which leads to not only the worsening of semiconductor optical output characteristics but also the increase of the threshold current as well as the efficiency deterioration. Furthermore, the crystallinity deterioration at the interface portion has an effect on the block structure in the case of DC-PBH-LD which results in increasing the threshold current and lowering the efficiency.
Also, the material gas density fluctuation not only increases the photo-luminescence half-width due to the crystallinity deterioration of the growth layer but also fluctuates the growth layer composition as well as the photo-luminescence wavelength. This raises a problem where it is difficult to control the band gap energy of the growth layer in addition to the strained MQW layer.
If the diffraction grating forming region
5
is adequately spaced to avoid the problem as described above, the throughput during the electron beam exposure is lowered and the manufacturing cost is greatly increased.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method for manufacturing a diffraction grating and a method for manufacturing a distributed feedback type semiconductor laser, in which a high quality crystal growth layer can be formed on a diffraction grating which is locally formed by an electron beam exposure method.
Another object of the present invention is to form a strained MQW active layer wherein the band gap wavelength is not fluctuated on a planar portion and to manufacture a distributed feedback semiconductor laser with the excellent low threshold current characteristics.
A method for manufacturing a diffraction grating according to the present invention is to locally form the diffraction grating on a predetermined position of a semiconductor substrate including a process to coat a resist on an entire surface of the semiconductor substrate; a process to make electron-beam lithography of a diffraction grating pattern comprising straight line patterns to be reciprocally disposed in parallel with the predetermined position of the resist and make a local electron-beam exposure of said resist; a process to develop said resist; and a process to etch the semiconductor substrate using the developed resist as an etching mask wherein the resist used for the semiconductor substrate etching is all removed therefrom except from the diffraction grating forming region.
It is preferable that the resist left on the diffraction grating forming region only by the developing process be formed so that the resist-coated area may be reduced as said resist is away from the diffraction grating forming region. More particularly, a contour of the resist side end portion left on the diffraction grating forming region only may preferably be in the form of concave and convex, zigzag or sine function. Accordingly, if an etching mask pattern so designed as to have the resist-coated area gradually and uniformly changed is used, the average height of the semiconductor substrate resulted from forming a diffraction grating via a wet etching method is not discontinuously changed but gradually changed in the diffraction grating forming region and non-diffraction grating forming region. This is because the wet etchant consumption change is not steep at the interface therebetween. As described above, the gradual change of the average height of the semiconductor substrate enables the semiconductor layer in addition to the strained MQW layer formed thereon to become the same high quality crystal layer as that formed on a planar semiconductor substrate.
To form the diffraction grating as described above, a diffraction grating pattern is exposed by an electron beam exposure method on the adjacent region to be an active layer only during the process of forming a diffraction grating. Thereafter, the region which is not exposed by the electron beam is preferably exposed by a method using deep ultraviolet light in the wavelength range of 200-300 nm (hereinafter “Deep UV” or “deep ultraviolet”) and developed so that the resist may be left on the adjacent active region only and the resist-coated area can be gradually reduced from the resist-coated region to the non-resist coated region. Shown in
FIG. 2
is the exposure pattern generated
Morimoto Takao
Muroya Yoshiharu
Mulpuri Savitri
Sughrue & Mion, PLLC
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