Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
2000-07-27
2001-12-11
Bowers, Charles (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S689000, C438S701000, C438S713000, C438S734000, C257S383000, C216S013000, C216S017000, C216S083000
Reexamination Certificate
active
06329300
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a conductive pattern layer, and more particularly, to a method for manufacturing: a molybdenum (Mo) layer which is used in a thin film transistor (TFT) of a liquid crystal display (LCD) apparatus.
2. Description of the Related Art
In a method for manufacturing an LCD apparatus, a refractory metal layer is used for gate electrodes, source electrodes and drain electrodes of TFTs in order to reduce the resistance thereof.
Generally, etching of refractory metal requires a large scale dry processing apparatus by gas plasma, which increases the manufacturing cost. However, Mo has an advantage that etching of Mo can be carried out by a wet processing apparatus, thus decreasing the manufacturing cost. Note that Mo is also resistant to alkali, which is another advantage.
In a prior art method for manufacturing a Mo pattern layer, a Mo layer is deposited on a substrate, and a photoresist pattern layer is coated on the Mo layer. Then, the No layer is etched by a nitric acid/phosphoric acid/acetic acid solution using a photoresist pattern layer to expose the substrate. This will be explained later in detail.
In the above-described prior art method, however, since the Mo layer has a columnar structure perpendicular to the glass substrate, overhanging edges are formed on the ends of the Mo layer. Also, since the etching solution has a high viscosity, the etching solution cannot penetrate the interface between the Mo layer and the photoresist pattern, so as to enhance the overhanging edges. Also, the coverage characteristics of an insulating layer on the Mo layer deteriorate, due to the overhanging edges of the Mo layer, so that voids would be generated in the insulating layer in the proximity of the overhanging edges. As a result, the breakdown voltage characteristics of the insulating layer between the Mo layer and an upper conductive layer deteriorate due to the presence of the voids. Also, electrostatic destruction would start from the overhanging edges of the Mo layer, which would destroy elements connected to the Mo layer. Further, since the coverage characteristics of the upper conductive layer deteriorate, short-circuited states are generated in the upper conductive layer.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method for manufacturing a conductive pattern layer such as a Mo pattern layer capable of suppressing the generation of overhanging edges.
According to the present invention, in a method for manufacturing a conductive pattern layer, a conductive layer is deposited on a substrate, and an etching mask layer is coated on the conductive layer. First, the conductive layer is etched by a first etching solution using an etching mask layer to expose the substrate a sidewall of the conductive layer. Then, the conductive layer is etched by a second etching solution using the etching mask to retard the sidewall of the conductive layer.
Thus, even if overhanging edges are generated in the conductive layer by the first etching step, such overhanging edges are removed by the second etching step.
REFERENCES:
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Bowers Charles
Lee Hsien-Ming
Michael Best & Friedrich LLC
NEC Corporation
Whitesel J. Warren
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