Method for manufacturing capacitor embedded in PCB

Metal working – Barrier layer or semiconductor device making – Barrier layer device making

Reexamination Certificate

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Details

C029S025410, C029S025420, C361S313000, C174S262000, C438S361000

Reexamination Certificate

active

07736397

ABSTRACT:
A method for manufacturing a capacitor embedded in a PCB includes: preparing a copper clad lamination (CCL) substrate having a reinforcement member and copper foils formed on both surfaces of the reinforcement member; planarizing surfaces of the copper foils of the CCL substrate; forming a dielectric layer on the planarized surface of the copper foils; and forming a top electrode on the dielectric layer.

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Japanese Office Action issued in Japanese Patent Application No. 2007-096291, mailed Jun. 9, 2009.
Japanese Office Action issued in Japanese Patent Application No. 2007-096291, dated Jan. 12, 2010.

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