Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
1999-12-20
2002-06-18
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S830000, C029S846000, C427S096400, C427S097100
Reexamination Certificate
active
06405431
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a multi-layer printed circuit board for use in computers, VTR, portable telephones and the like. More particularly, the present invention relates to a method for manufacturing a build-up multi-layer printed circuit board in which an yttrium aluminum garnet (hereinafter, referred to as “YAG”) laser is used upon the formation of a via hole in the multi-layer printed circuit board, such that it can have the following advantages: the manufacturing process would become simple; the component packaging density and freedom for the design of the board would be improved; and a high speed of signal process would be ensured.
2. Description of the Prior Art
In the midst of the progress of the electronic components and the component installation technique, the printed circuit board was devised. Since that time, studies have been briskly carried out to make the printed circuit board highly dense. Particularly, the method for manufacturing the multi-layer printed circuit board by applying the build-up method is widely used. This method is different, from the general conventional method in which circuit layers having BVH(blind via holes) are formed, and this method is as follows. That is insulating layers and circuit conductive layers are alternately stacked to form a multi-layer printed circuit board. The manufacture of the printed circuit board based on the build-up method not only is simple, but also the formation of the via hole for serving as the connections between the different layers is easy. Further, in forming the via hole, extremely small diameters are possible, and the thickness of the circuit conductors is very thin, with the result that tiny circuits can be easily formed.
This build-up MLB(multi-layer board) is classified into two kinds in accordance with the method of forming the via hole. One is a method resorting to a chemical etching, and the other is a method using a laser. Recently, the method using a laser is widely used rather than the method resorting to the chemical etching. Further, in manufacturing the build-up MLB, generally the excimer laser is used.
FIG. 1
is illustrates the general process for manufacturing the build-up MLB by using the excimer laser.
As shown in
FIGS. 1
a
and
1
b
, first an inner pattern
12
is formed by applying the general photo-etching process on a copper clad laminate(to be called “CCL” below)
10
having insulating layers(in th form of copper oxide) on th both faces thereof.
The CCL
10
with the inner pattern
12
formed thereon is pre-stacked on a copper foil
14
with an organic film
15
coated thereon. The pre-stacking is carried out by subjecting them to heating and pressing as shown in
FIG. 1
c
. The organic film-coated copper foil
14
is the one on which an organic film
15
containing no inorganic fiber reinforcing agent such as polymide film is coated. However, in the case of the excimer laser, the processing of the copper is difficult, and therefore, in the pre-stacked board, the copper foil on the organic film-coated foil
14
has to be removed by etching before the hole is formed by means of the excimer laser. Or only the organic film
15
without the copper foil
14
may be used, but in this case, the pressing for the pre-stacking becomes difficult.
FIG. 1
d
illustrates a state in which the copper foil of the organic film-coated copper foil
14
has been removed.
Thereafter, as shown in
FIG. 1
e
, the excimer laser beams are irradiated to the board to form a via hole
16
. Under this condition, in the case of the build-up MLB, the via hole can be formed to a diameter of 0.05~0.2 mm.
Then as shown in
FIG. 1
f
, the via hole
16
is electroplated by applying an electroless(chemical) copper plating to form an electroplated layer
17
, so that the inner-layer contacts of the board can be efficiently realized. Then an electro plating is carried out to form a pattern
18
as shown in
FIG. 1
g.
If the process steps of
FIGS. 1
c
to
1
g
are repeated, the circuited layers can be stacked as much as desired.
Then finally, a through hole
19
is foamed by mechanical drilling or by using laser beams, thereby obtaining a build-up MLB as shown in
FIG. 1
h.
The above described manufacturing process has to be carried out on the both faces of the substrate, but in the above, the descriptions were made only for one face for the sake of the describing simplicity.
In the above described conventional method, the via hole is formed by means of the excimer laser. In this case, the organic film-coated copper foil is completely removed by etching, and then, a Cu electroplating is carried out, this being a troublesome task. Particularly, during the use of the excimer laser, in order to prevent the scattering of the optical beams, an image hole mask has to be put on the organic film coated copper foil.
Further, in the case where a material RF-4 is used as substitution for the organic film, the use of the excimer laser becomes impossible. Therefore, the selection of the material for the insulating layer is limited, and the freedom for the drilling depth is lowered, with the result that the density is lowered, Besides, the excimer laser uses toxic gases such as Xe, Cl, XrF, and therefore, a perfect sealing is required. Therefore, the manufacturing factory may cause an environmental pollution.
An another example of methods for processing a via hole in a chemical etching manner is disclosed in U.S. Pat. No, 5,544,773.
In this conventional method, as shown in
FIG. 1
, a printed circuit pattern is formed on a copper clad laminate (CCL) having copper foils on the both faces thereof, and a resin coated copper foil (to be called “RCC” below) on the one face thereof is stacked on the CCL with the printed circuit pattern to form a pre-stacked board. Next, so as to form the via hole at a predetermined position on the pre-stacked board, first the copper foil on the RCC is primarily removed by using the chemical etching, and the remaining resin is melt by means of an alkali water solution. As mentioned, however, the conventional method should have a double process, which results in some problems in that the hole process is made in a complicated manner and thereby, the productivity would be decreased. Moreover, the hole process of a diameter of 100 &mgr;m or less is not possible due to the resolution limit of an etch resist, such that a high integrated component packaging density would not be obtained. In addition, on the printed circuit board with one to three or more printed circuit layers formed thereon, the one to three or more printed circuit layers are not directly connected, such that the freedom for the design of the board would be lowered. On the other hand, in the conventional method the remaining resin within the bottom of the hole after completion of the hole process is removed by using a separate desmear process to ensure the reliability of electroplating within the via hole. At this time, in case of using KMnO
4
, the resins on the left and right portions within the interior of the via hole would be undesirably damaged.
As another example, there is the build-up MLB manufacturing technique of Japanese Patent Laid-open Hei-4-111497.
This build-up MLB manufacturing technique has the following features. That is, as shown in
FIGS. 2
a
and
2
b
, a metal layer
22
is provided on one face, and as an intermediate layer, an insulating layer
20
or the insulating layer
20
plus a metal layer
23
and another insulating layer
25
are provided. On the other face, there is provided a metal layer(or a resist layer)
24
. Then a via hole is formed by carrying out a wet etching or by means of laser beams.
That is, as shown in
FIG. 2
b
, the metal layer or resist layer
24
is formed in the following manner. That is, the required area is removed as much as needed to expose the insulating layer
25
, and then, the insulating layer
25
is removed by carrying out a wet etching. The above process steps are repeated as much as required to
Joung Jae Heun
Park Keon Yang
Shin Dong
Shin Young Hwan
Sun Byung Kook
Arbes Carl J.
Gilman & Berner LLP
Hauptman Lowe
Samsung Electro-Mechanics Co. Ltd.
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