Method for manufacturing bipolar transistor by selective epitaxi

Details Method for manufacturing bipolar transistor by selective epitaxi Method for manufacturing bipolar transistor by selective epitaxi

1989-08-24

1992-03-17

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 89, 437 99, 437188, 437196, 357 34, H01L 21331

Patent

active

050968440

ABSTRACT:
The invention relates to a method in particular for manufacturing bipolar transistors. By applying selective epitaxy methods and by using self-adjusting techniques, the process sequence is shortened and the transistor properties are improved.

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F. S. J. Lai, "Dielectrically Isolated CMOS Structure Fabricated by Reverse Trnech Process", IBM Technical DISCLOSURE BULLETIN, vol. 26, No. 6, Nov. 1983.

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