Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
2008-10-20
2010-11-30
Pham, Thanh V (Department: 2894)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C438S155000, C438S698000, C257S072000, C257SE21415
Reexamination Certificate
active
07842528
ABSTRACT:
A manufacturing method of the present invention includes a process using a first multi-tone mask, in which a first conductive layer in which a transparent conductive layer and a metal layer are stacked over a substrate, a gate electrode formed of a first conductive layer, and a pixel electrode formed of a single layer of the transparent conductive layer are formed, a process using a second multi-tone mask, in which a contact hole to the pixel electrode, and an island of an i-type semiconductor layer and an n+type semiconductor layer are formed after a gate insulating film, the i-type semiconductor layer, and the n+type semiconductor layer are formed, a process using a third photomask, in which a source electrode and a drain electrode are formed after a second conductive layer is formed, and a process using a fourth photomask, in which an opening region is formed after a protective film is deposited.
REFERENCES:
patent: 6008065 (1999-12-01), Lee et al.
patent: 6485997 (2002-11-01), Lee et al.
patent: 6493048 (2002-12-01), Baek et al.
patent: 6635581 (2003-10-01), Wong
patent: 7599014 (2009-10-01), Shih
patent: 2001/0007779 (2001-07-01), Lee et al.
patent: 2005/0263768 (2005-12-01), Ahn
patent: 2005/0270434 (2005-12-01), Jung et al.
patent: 2006/0290867 (2006-12-01), Ahn et al.
patent: 2007/0002249 (2007-01-01), Yoo et al.
patent: 2007/0126969 (2007-06-01), Kimura et al.
patent: 2007/0146591 (2007-06-01), Kimura et al.
patent: 2007/0222936 (2007-09-01), Shih
patent: 2009/0033818 (2009-02-01), Nakajima et al.
patent: 2009/0101906 (2009-04-01), Hosoya et al.
patent: 2009/0104723 (2009-04-01), Hosoya et al.
patent: 2009/0108260 (2009-04-01), Lin et al.
patent: 2009/0117691 (2009-05-01), Fujikawa et al.
patent: 2009/0148970 (2009-06-01), Hosoya et al.
patent: 2001053283 (2001-02-01), None
patent: 2001235763 (2001-08-01), None
patent: 2007011340 (2007-01-01), None
patent: 2007011343 (2007-01-01), None
patent: 2007183583 (2007-07-01), None
patent: 2007183585 (2007-07-01), None
patent: 2007243144 (2007-09-01), None
Chiba Yoko
Fujikawa Saishi
Hosoya Kunio
Fish & Richardson P.C.
Munoz Andres
Pham Thanh V
Semiconductor Energy Laboratory Co,. Ltd.
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