Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2000-01-12
2001-08-14
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S426000, C438S701000, C438S713000, C257S506000, C257S774000
Reexamination Certificate
active
06274457
ABSTRACT:
BACKGROUND OF THE INVENTION
1. FIELD OF THE INVENTION
The present invention relates to the structure of a semiconductor device and a method for preparing the structure, in particular to a trench structure of device isolation region for electrically isolating devices and a method for preparing the trench structure.
2. BACKGROUND OF THE INVENTION
In
FIG. 9
, there is shown a conventional process for fabricating a semiconductor device which has a device isolation region formed therein. In
FIG. 9
is shown the formation of a device isolation region disclosed in JP-A-5259269.
In accordance with the conventional process, a trench is formed so as to have a sidewall bent in a two-stage fashion from a surface of a semiconductor substrate toward a bottom thereof, and then thermal oxidation is carried out to form a device isolation region having a silicon oxide film in the trench.
In the formation of the device isolation according to the conventional method, a silicon oxide film
102
and a silicon nitride film
103
are sequentially deposited on the surface
101
a
of the semiconductor substrate
101
, and a resist pattern
104
which has a window
104
a
formed therein so as to correspond to a device isolation region forming portion is deposited on the silicon nitride film
103
as shown in FIG.
9
(
a
).
Next, the silicon nitride film
103
is subjected to an anisotropic etching with use of the resist pattern
104
as an etching mask to dig a portion of the silicon nitride film under the window
104
a
as shown in FIG.
9
(
b
).
Further, the silicon oxide film
102
is etched by RIE (Reactive Ion Etching) with use of the resist pattern
104
as an etching mask to dig a portion of the silicon oxide film under the windows
104
a
, thereby exposing a portion of the surface
101
a
of the semiconductor substrate
101
under the window as shown in FIG.
9
(
c
).
The portion of the surface
101
a
of the semiconductor substrate
101
is continuously subjected to RIE to be digged down, providing a trench
105
having a profile angle
105
a
as shown in FIG.
9
(
d
). At that time, a fluorocarbon polymer film
106
is simultaneously created and is deposited on a sidewall of the window
104
a.
After that, the semiconductor substrate
101
is subjected to isotropic etching with use of the fluorocarbon polymer film
106
as an etching mask to further dig the trench
105
, providing a trench
107
having a substantially vertical sidewall as shown in FIG.
9
(
e
).
Next, the resist pattern
104
and the fluorocarbon polymer film
106
are eliminated as shown in FIG.
9
(
f
).
After that, the device isolation region can be formed by providing a silicon oxide film on the trench
107
by thermal oxidation though not shown.
As explained, in the device isolation region formed according to the conventional method, the trench
107
is formed so as to have such a vertical sidewall, and the silicon oxidation film is deposited on the trench by thermal oxidation. As a result, a great deal of stress is applied to a bent portion with a bottom surface and the sidewall of the trench
107
contacting each other, and a defect is caused in the semiconductor substrate
101
by the stress, creating a problem in that device isolation characteristics degrade.
In general, a device isolation region which is provided by a trench in a semiconductor substrate and burying an isolating film in the trench for electrically isolating devices is called trench isolation. The formation of the trench isolation has a problem in that an edge portion suffers from a inverse narrow channel effect wherein the subthreshold characteristics of a transistor formed near to the trench isolation is adversely affected by a parasitic MOS transistor and wherein the threshold voltage of the transistor lowers as the size of the channel width is reduced. This is because the presence of a steep angle at a trench edge near to the surface of the substrate having the silicon oxide film for the device isolation with the substantially vertical sidewall causes an electric field from a gate electrode to concentrate on the trench edge when a voltage is applied to the gate electrode.
In addition, there is created a problem in that the oxidation of a surface of the device isolation region and the oxidation of a surface of an active region around it are different from each other in terms of oxidation rate, and an oxidation film which is formed on the active region and required for formation of a gate oxidation film as a constituent element of a MOS transistor is made into a thin film.
The device isolation region has to be buried at a position deeper than a predetermined depth in order to ensure required device isolation characteristics.
In the fabrication, the trench
107
is formed so as to have the stepwise sidewall by etching under two kinds of different conditions with use of the single etching mask. In the etching wherein the fluorocarbon polymer film
106
is created and deposited on the sidewall of the etching mask, the fluorocarbon polymer film
106
deposited on the sidewall peels at random during the etching, and some of a plurality trenches finally formed in a single substrate have uneven shapes, creating a problem in that devices formed around the device isolation region are adversely affected in terms of electrical sense.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve these problems, and to provide a semiconductor device including a trench isolation capable of ensuring required device isolation characteristics and obtaining good electrical characteristics, and a method for manufacturing the device.
According to a first aspect of the present invention, there is provided a semiconductor device which comprises a semiconductor substrate; a trench formed in the substrate and having an inner wall including a sidewall and a bottom surface; a silicon oxide film deposited on the inner wall; and a buried oxide film deposited on the silicon oxide film to bury the trench; wherein the sidewall has portions of a sidewall sloped at a first profile angle A
1
, a second profile angle A
2
and a third profile angle A
3
from a surface of the substrate toward the bottom surface of the trench, and the profile angles have a relationship of A
1
<A
2
, A
3
<A
2
and A
1
<83°.
According to a second aspect of the present invention, the silicon oxide film is deposited by subjecting the substrate to thermal oxidation.
According to a third aspect of the present invention, there is provided a method for manufacturing a semiconductor device, which comprises patterning an etching mask having a window on a surface of a semiconductor substrate; forming a sidewall deposit on a sidewall of the window; subjecting the substrate to first etching with use of the etching mask and the sidewall deposit to form a first trench in the substrate; eliminating the sidewall deposit; subjecting the substrate to second etching with use of the etching mask to dig the first trench and form a second trench so as to occupy a region corresponding to the window in the substrate; depositing a silicon oxide film on an inner wall of the second trench by thermal oxidation; depositing a buried oxide film on the silicon oxide film to bury the second trench; and eliminating the etching mask; wherein the second trench is formed so as to have portions of a sidewall sloped at a first profile angle A
1
, a second profile angle A
2
and a third profile angle A
3
from the surface of the substrate toward a bottom surface of the second trench, and the profile angles have a relationship of A
1
<A
2
, A
3
<A
2
and A
1
<83°.
According to a fourth aspect of the present invention, there is provided a method for manufacturing a semiconductor device, which comprises patterning an etching mask having a window on a surface of a semiconductor substrate; forming a first sidewall deposit on a sidewall of the window; subjecting the substrate to first etching with use of the etching mask and the first sidewall deposit to form a first trench in the substrate; reducing a size of the fi
Horita Katsuyuki
Kuroi Takashi
Sakai Maiko
Blum David S
Bowers Charles
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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