Method for manufacturing an integrated circuit arrangement

Details Method for manufacturing an integrated circuit arrangement Method for manufacturing an integrated circuit arrangement

1994-11-17

1995-11-28

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 67, 437 62, 437924, 148DIG102, H01L 2176

Patent

active

054707820

ABSTRACT:
A trench structure is produced in a substrate wafer in a two-step trench process. A trench mask is produced in a first etching step and the trench structure is realized in the substrate wafer in a second etching step. An auxiliary lithography structure is produced in the substrate wafer in the trench process. A protective structure that protects the substrate wafer in the region of the auxiliary lithography structure against an etching attack in the second etching step is formed in the region of the auxiliary lithography structure in the manufacture of the trench mask.

REFERENCES:
patent: 4893163 (1990-01-01), Rudeck
patent: 4968628 (1990-11-01), Delgado et al.
patent: 5032529 (1991-07-01), Beitman et al.
patent: 5077228 (1991-12-01), Eklund et al.
patent: 5112772 (1992-05-01), Wilson et al.
International Symposium on Power Semiconductor Devices & ICs, Tokyo, 1990, "New 500V Output Device Structures for Thin Silicon Layer on Silicon Dioxide Film", A. Nakagawa et al, pp. 97-101.
Siemens AG, Corporate Research and Development, Microelectronics--"Optimisation of Selective Polysilicon Oxidation for 0.8.mu.m- Technology".
Silicon Processing for the VLSI Era, 1987, "Lithography II: Optical Alignment Tools and Photomasks", S. Wolf et al, pp. 473-476.

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