Method for manufacturing an in-plane electric field mode...

Liquid crystal cells – elements and systems – Nominal manufacturing methods or post manufacturing...

Reexamination Certificate

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C349S141000

Reexamination Certificate

active

06801293

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a liquid crystal element, and in particular to an in-plane electric field mode liquid crystal element.
BACKGROUND ART
Liquid crystal elements, and particularly liquid crystal display devices, are used not only in monitors for notebook computers and desktop computers but also in the display portion and portions related to the display portion of various apparatuses, including the viewfinder of video cameras and in projections displays, and recently they have come to be used as the display portion of televisions as well. Moreover, they are also utilized as optoelectronic-related elements such as optical printer heads, optical Fourier transform elements, and light valves.
Presently, liquid crystal elements are most often used in display devices, and typical liquid crystal display modes include the TN (twisted nematic) mode, the VA (vertical alignment) mode, and the IPS (in-plane-switching) mode.
Of these, the IPS mode, which is also called the in-plane electric field mode and the comb electrode mode, is characterized in that the liquid crystal molecules are orientated substantially parallel to the substrate surface so that by generating an electric field parallel to the substrate surface the liquid crystal molecules are rotated within the substrate surface, and therefore there are few changes in brightness due to the viewing angle direction, which in turn results in excellent viewing angle properties (“Liquid Crystal Display Technologies”, pg. 4, published by Sangyo Tosho; also, JP H10-206867A).
In addition to the above, as an improved version of the IPS mode there is also the FFS (fringe field switching) mode, in which the electrode interval is narrowed and driving is performed using an oblique electric field, and the HS (hybrid switching) mode, in which electrodes are formed at opposing sides of the substrate and an oblique electric field is utilized. It should be noted that, strictly and purely technically speaking, both of these modes include features not present in the IPS mode, however, they share the object, configuration, and effect of the invention of the present application described below (or they can utilize the concept of the invention of the present application). For this reason, in the present specification, and especially in the scope of the claims, IPS mode or in-plane electric field mode also includes the FFS and HS modes.
For comparison, these three modes are illustrated in FIG.
1
. In the drawing, numeral
1
is an array substrate, numeral
2
is an opposing substrate, numeral
3
is a liquid crystal, numeral
6
is a source line, numeral
7
is a scanning line, and numeral
17
is a thin film semiconductor. However, because the technical contents of these modes are so-called widely known technologies, a description of them has been omitted.
The filling of liquid crystal into the liquid crystal panel of not only the IPS mode is shown in FIG.
2
. First, a belt
201
of sealing resin is printed thinly around the four corners of a single glass substrate
2
by printing, and the glass substrate
2
is aligned with a separate glass substrate
1
to form a cell. Next, liquid crystal is vacuum loaded into the cell through an injection port formed by leaving out a portion of the sealing resin, after which a UV curable resin
202
is applied to that injection port and the liquid crystal is sealed in. This is followed by curing the resin for sealing the port by UV light irradiation.
With this method, however, bubbles
151
or foreign matter
15
may be left in the gap of the injection port between the two glass substrates when applying the UV resin. If bubbles or the like are left, then, as shown in
FIG. 3
, the bubbles or foreign matter, for example, remaining in the UV curable resin scatter and refract or absorb the UV light during UV irradiation, and the UV curable resin behind the bubbles seen from the direction of UV irradiation is not sufficiently irradiated with UV light. The result is that not only does the UV resin at insufficiently irradiated portions simply remain uncured in this state, but the uncured resin disperses into the liquid crystal when used, and thus becomes a factor that lowers the long-term reliability of the liquid crystal element. Furthermore, countering this by irradiating the UV light from various directions complicates the process.
Also, continuously using a TFT liquid crystal display device of the IPS mode may cause display uniformities where, for a black-and-white display, what should originally be displayed white appears as black dots. These so-called black dot nonuniformities must be eliminated because they can significantly reduce the display quality. A method for countering and eliminating these black dot display nonuniformities is mentioned in JP-H10-206857A. According to this method, black dot nonuniformities are generated by an electrochemical reaction occurring at a cracked portion of the protective layer between the pixel electrode and the source signal line, which lowers voltage holding ratio in the liquid crystal layer due to the creation of ionic material and changes the arrangement of the liquid crystal. (Consequently, depending on whether the display mode is so-called normally white or normally black there can also be white dot display nonuniformities. Furthermore, in color displays, the color of display nonuniformities is not limited to black and white. For this reason, the concept referred in the present specification as “black dot display nonuniformities,” for example, also encompasses “white or colored dot display uniformities resulting from a drop in voltage holding ratio.”) The result is that black dot nonuniformities can be eliminated by making the protective layer thicker than the electrode or forming an organic polymer protective layer.
The following is a description of a conventional liquid crystal display device of the IPS mode, with reference to the drawings.
FIG. 4
schematically illustrates a plan view of a pixel of the array substrate of a liquid crystal display device. FIGS.
5
(
1
) and
5
(
2
) are views showing cross sections taken along the lines A—A and B—B, respectively, in FIG.
4
. FIGS.
6
(
1
),
6
(
2
), and
6
(
3
) are views showing cross sections taken along the lines C—C, D—D, and E—E, respectively, in FIG.
1
. The opposing substrate in FIGS.
6
(
2
) and
6
(
3
) is identical to that in FIG.
6
(
1
), and thus has been omitted from FIGS.
6
(
2
) and
6
(
3
).
In
FIGS. 4 and 5
, numeral
5
is a common electrode and numeral
7
is the gate signal line, and these are formed in the same layer. Next, an insulating layer
8
is formed on this layer (to the liquid crystal layer side), a thin film transistor (TFT)
17
made of a semiconductor layer, a source signal line
6
, and a pixel electrode
4
are further pattern-formed, and a protective layer
10
is deposited thereon, thus forming an array substrate. Orientation films
9
are formed on the array substrate and on the opposing surface side of an opposing (color filter) substrate
2
that is in opposition to the array substrate, and furthermore a liquid crystal layer
3
is formed between these substrates, thus forming a liquid crystal display panel.
FIG. 6
is a slightly more detailed cross-sectional view of the same, the contents of which will be described later.
As shown by these three drawings, unlike a TN-type liquid crystal panel, the electrodes in an IPS panel are in the same plane.
Also, the electrode connected to the drain of the thin film transistor is called the pixel electrode, and the electrode that is not connected to the drain is called the common electrode.
However, extremely fine processing is required in the manufacturing process of such a liquid crystal display panel, so contamination by foreign matter during manufacturing causes short circuits at the intersecting portions of the gate signal lines and the source signal lines and at portions where the gate signal lines are close to the common electrodes, for example, and this becomes a major factor that lowers production y

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