Method for manufacturing a thin-film transistor operable at high

Details Method for manufacturing a thin-film transistor operable at high Method for manufacturing a thin-film transistor operable at high

1990-10-31

1991-08-13

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 34, 437 40, 437 44, 437913, 437915, 148DIG82, 148DIG150, H01L 21335

Patent

active

050396226

ABSTRACT:
There are disclosed a structure and a manufacturing method of a MOS-type thin-film field effect transistor composed of a substrate having an insulating main surface, a gate electrode formed on the insulating main surface to have an upper surface and a side surface at its edge, an insulating film covering at least the upper and side surfaces of the gate electrode, a semiconductor film having three continuous first, second and third portions, the first portion positioned above the upper surface of the gate electrode, the second portion being formed in contact with the insulator film at the side surface of the gate electrode and the third portion positioned above the substrate without interposing the gate electrode, a side-wall insulator formed on a part of the third portion of the semiconductor film and having a side surface contacting the second portion of the semiconductor film, and source and drain regions formed by introducing impurity atoms into the first portion and another part of the third portion of the semiconductor film, the part and the other part of the third portion being in contact with each other. The introduction of the impurity atoms is performed with use of the sidewall insulator as a mask by ion-implantation process or a process for converting insulator solution containing impurity atoms into a solid-state insulator by a heat treatment.

REFERENCES:
patent: 4449285 (1984-05-01), Janer et al.
patent: 4701996 (1987-10-01), Calviello
Hochberg et al., "Fabrication of MOS Devices with Close Source-Drain Spacing", IBM Tech. Disc. Bul., vol. 10, No. 5, 10/67, pp. 653-654.

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