Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1998-06-03
2000-04-18
Fourson, George
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438253, 438795, H01L 2128
Patent
active
060514752
ABSTRACT:
A process is described for the manufacture of a capacitor having low V.sub.cc. Said process is fully compatible with standard IC manufacturing and introduces minimum modification thereto. The process involves the formation of a capacitor having both upper and lower electrodes that comprise layers of a metal silicide. The lower electrode is formed as a byproduct of the SALICIDE process while the upper electrode is formed by first laying down a layer of polysilicon followed by a layer of a silicide-forming metal such as titanium, cobalt, or tungsten. Sufficient of the metal must be provided to ensure that all of the polysilicon gets transformed to silicide.
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Chen Chun-Hon
Ho Yen-Shih
Abbott Elizabeth
Ackerman Stephen B.
Fourson George
Saile George O.
Taiwan Semiconductor Manufacturing Company
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