Method for manufacturing a semiconductor substrate having a comp

Details Method for manufacturing a semiconductor substrate having a comp Method for manufacturing a semiconductor substrate having a comp

1992-05-15

1993-09-14

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 5, 437228, 437234, 148DIG149, H01L 2120

Patent

active

052448304

ABSTRACT:
There is disclosed a method for manufacturing a semiconductor substrate having a compound semiconductor layer on a single-crystal silicon wafer, the method comprising the steps: sequentially forming first and second compound semiconductor epitaxial layers on a compound semiconductor wafer; forming a first silicon oxide layer on the second compound semiconductor epitaxial layer at a predetermined low temperature and depositing a poly-crystal silicon layer on the first silicon oxide layer; removing portions of the larminated layers by using a etching technique to form grooves on the compound semiconductor wafer; depositing a second silicon oxide layer overlying thereon at a predetermined low temperature; etching back horizontal portions of the second silicon oxide layer to form side walls in each of the grooves and polishing the polysilicon layer to form a planar surface thereon; bonding the planar surface and the single-crystal silicon wafer by using a thermal process technique; removing the compound semiconductor wafer by using a polishing process technique to expose the first compound semiconductor epitaxial layer; and etching back the first compound semiconductor epitaxial layer and the side walls to form the semiconductor substrate.

REFERENCES:
patent: 4891329 (1990-01-01), Reisman et al.
patent: 5011550 (1991-04-01), Konushi et al.
patent: 5064781 (1991-11-01), Cambou et al.
patent: 5145793 (1992-09-01), Oohara et al.

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