Method for manufacturing a semiconductor memory

Details Method for manufacturing a semiconductor memory Method for manufacturing a semiconductor memory

1992-05-18

1995-07-04

Fourson, George

Fishing, trapping, and vermin destroying

437228, H01L 21265

Patent

active

054299659

ABSTRACT:
A method of making a semiconductor memory is disclosed. The cell has MNOS structure, and comprises a p-type silicon substrate 27 with n.sub.+ type layers 21, 23, a silicon dioxide film 19 thereon, a reduced pressure SiN film 17 thereon and a polysilicon film 14 thereon. The surface of the channel region 25 has projecting portions so the semiconductor memory employing the cell, compared to that of the prior art, permits tunneling of electrons with a low programming voltage.

REFERENCES:
patent: 4906590 (1990-03-01), Kanetaki et al.
patent: 5198380 (1993-03-01), Harari
Yatsuda et al. "An Advanced MNOS Memory Device For Highly Integrated Byte-Erasable" 5V-only EEPROMS, IDEM, pp. 733-736, 1982.

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