Method for manufacturing a semiconductor integrated circuit devi

Details Method for manufacturing a semiconductor integrated circuit devi Method for manufacturing a semiconductor integrated circuit devi

1992-06-24

1994-12-13

Fourson, George

Fishing, trapping, and vermin destroying

437 48, H01L 21335

Patent

active

053729617

ABSTRACT:
A method of manufacturing a ROM which has a memory cell array with a plurality of MIS transistors which are serially connected. An impurity of the same conductivity type as the semiconductor substrate is introduced by ion implantation after forming a field oxide and a gate electrode so as to compensate for an impurity of the opposite conductivity type, which is simultaneously ion implanted beneath the field oxide following ion implantation for programing so as to penetrate the gate electrode and a gate oxide. Punch through between adjacent cells is suppressed by the impurity of the same conductivity type.

REFERENCES:
patent: 4406049 (1983-09-01), Tam et al.
patent: 4513494 (1985-04-01), Batra

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