Fishing – trapping – and vermin destroying
Patent
1991-06-14
1992-10-27
Thomas, Tom
Fishing, trapping, and vermin destroying
437 47, 437 48, 437 60, 437228, 437233, 437235, 437919, 357236, H01L 2170
Patent
active
051589052
ABSTRACT:
A method for manufacturing a villus-type capacitor of a semiconductor memory device formed by stacking a storage electrode, a dielectric film and a plate electrode on a semiconductor substrate further comprising the steps of forming a first conductive layer by depositing a conductive material on the semiconductor substrate; covering the first conductive layer with a second material having grains of a first material; selectively removing the second material using the grains of the first material as a mask; etching a predetermined portion of the first conductive layer using a grain pattern formed by removing the second material as a mask; removing the grain pattern; completing the formation of a storage electrode by defining into each unit cell the villus-formed first conductive layers on the surface of the device utillizing an etching process; forming the dielectric film over the surface of the storage electrode; and forming the plate electrode by depositing a second conductive layer over the dielectric film. The pillar-shaped storage electrode having dimensions below design rules and a buried bit line extend the capacitor's surface, resulting in an effective increase of capacitive area, and a corresponding increase in the cell capacitance.
REFERENCES:
patent: 4906590 (1990-03-01), Kanetaki et al.
T. Mine et al., "Capacitance enhanced stacked capacitor with engraved storage electrode for deep submicron DRAMS." Abs. of 21st Conf. on Solid State Devices and Materials, Tokyo 1989 pp. 137-140.
Stacked Capacitor DRAM Cell with Vertical Lims (VF-STC), IBMTDB, vol. 33, No. 2 Jul. 1990.
Samsung Electronics Corp., Ltd.
Thomas Tom
LandOfFree
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