Method for manufacturing a semiconductor device with MIS...

Semiconductor device manufacturing: process – Making passive device – Planar capacitor

Reexamination Certificate

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Reexamination Certificate

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06858513

ABSTRACT:
A semiconductor device having an MIS capacitor having a low capacitance value and an MIS capacitor having a high capacitance value formed on the same substrate, and a manufacturing method thereof. The first MIS capacitor consists of a lower conductive material region formed on the substrate, a multilayer dielectric film consisting of a first insulating film, serving as both an interlayer insulating film and a dielectric film, and a second insulating film serving as a dielectric film of the second MIS capacitor, and an upper conductive material film, and the capacitance of the first MIS capacitor is determined by an area of the dielectric film formed by the second insulating film.

REFERENCES:
patent: 4466177 (1984-08-01), Chao
patent: 4914497 (1990-04-01), Kondo
patent: 5858850 (1999-01-01), Gomi
patent: 63-177454 (1988-07-01), None
patent: 01 140653 (1989-06-01), None
patent: 01-235364 (1989-09-01), None
patent: 10-173063 (1998-06-01), None
patent: 11-040753 (1999-02-01), None

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