Method for manufacturing a semiconductor device wherein electrod

Details Method for manufacturing a semiconductor device wherein electrod Method for manufacturing a semiconductor device wherein electrod

1996-01-26

1997-09-09

Picardat, Kevin

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Encapsulating

438613, 205123, H01L 2160

Patent

active

056656521

ABSTRACT:
According to a face-down-mounting semiconductor device wherein electrode pads on a semiconductor chip and lead terminals are electrically connected to each other by plating bonding, and a method of manufacturing the semiconductor device, a guide tool is placed on the surface of a semiconductor chip. The guide tool includes guide holes corresponding in position to electrode pads. Columnar lead terminals are inserted into the guide holes of the guide tool. In this state, the semiconductor chip is soaked in a plating solution, together with the guide tool, to execute plating bonding. Since, therefore, the lead terminals can be brought into reliable contact with the electrode pads, metal plating layers can be grown sufficiently between them, thereby improving in reliability of melting bonding.

REFERENCES:
patent: 4672739 (1987-06-01), Churchwell et al.
patent: 4742024 (1988-05-01), Sugimoto et al.
patent: 4857482 (1989-08-01), Saito et al.
patent: 5098864 (1992-03-01), Mahulikar
patent: 5347162 (1994-09-01), Pasch
patent: 5410451 (1995-04-01), Hawthorne et al.
patent: 5416046 (1995-05-01), Wang
patent: 5459102 (1995-10-01), Shibata et al.
patent: 5556810 (1996-09-01), Fujitsu
IBM Technical Disclosure Bulletin, "Ball and Chip Placement Wafer", vol. 30, No. 1, Dec. 1987, pp. 124-125.

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