Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2008-01-08
2008-01-08
Deo, Duy-Vu N (Department: 1765)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S693000, C257S070000, C257S737000, C257S738000
Reexamination Certificate
active
07317245
ABSTRACT:
Disclosed is a method for manufacturing a semiconductor device substrate. A substrate having no bus line and lead-in line is efficiently manufactured. In a step needing an electroplating process, conductive film is temporarily attached to circuit patterns in order to electrically connect all circuit patterns. A plating is formed in desired regions of the circuit patterns with a predetermined thickness in an electroplating method. The conductive film is completely removed while the substrate is manufactured so that the circuit patterns are electrically independent of one another, and the resulting substrate has no bus line and lead-in line.
REFERENCES:
patent: 2005/0266608 (2005-12-01), Ho et al.
patent: 2006/0017151 (2006-01-01), Yoon et al.
patent: 2006/0145343 (2006-07-01), Lee et al.
patent: 2006/0145345 (2006-07-01), Choi et al.
patent: 2007/0010064 (2007-01-01), Das et al.
Lee Kyu Won
Park Chan Yok
Ryu Sang Hyun
Amkor Technology Inc.
Deo Duy-Vu N
Weiss & Moy P.C.
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