Method for manufacturing a semiconductor device having vertical

Metal working – Method of mechanical manufacture – Assembling or joining

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

148 15, 148187, 29578, H01L 21425

Patent

active

045773971

ABSTRACT:
The present invention provides a semiconductor device which includes a thick countersunk oxide layer selectively formed by the LOCOS process on the surface of a silicon body, openings formed in this oxide layer, and semiconductor element regions formed by the introduction of an impurity in the silicon body through these openings.
The semiconductor element regions preferably comprise the emitter region and the collector region of the lateral transistor.

REFERENCES:
patent: 3971059 (1976-07-01), Dunkley et al.
patent: 4144098 (1979-03-01), Roesner
patent: 4157268 (1979-06-01), Bergeron et al.
patent: 4191595 (1980-03-01), Aomura et al.
patent: 4325180 (1982-04-01), Curran
patent: 4472871 (1984-09-01), Green et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for manufacturing a semiconductor device having vertical does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing a semiconductor device having vertical , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a semiconductor device having vertical will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-623639

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.