Method for manufacturing a semiconductor device having regions o

Details Method for manufacturing a semiconductor device having regions o Method for manufacturing a semiconductor device having regions o

1980-11-18

1983-07-26

Smith, John D.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

148 15, 156603, 427 531, 427 86, H01L 2126, H01L 21268

Patent

active

043954332

ABSTRACT:
In gas phase growth of a polysilicon layer on a semiconductor substrate, a silicon layer of a single-crystal structure or a structure akin thereto may be formed only on an exposed surface of the substrate surrounded by an insulating film for element isolation by applying an energy beam to the substrate. A semiconductor device obtained by forming such an element as an MOS transistor on the silicon layer is free from any difference in level between an element region and an element isolation region, and hence from snapping or disconnection of any wiring traversing the boundary between those regions.

REFERENCES:
patent: 4027053 (1977-05-01), Lesk
patent: 4059461 (1977-11-01), Fann
patent: 4155779 (1979-05-01), Auston
patent: 4292091 (1981-09-01), Togei
patent: 4292093 (1981-09-01), Ownby
patent: 4305973 (1981-12-01), Yaron
M. Hanabussa et al., "Laser-Induced Vapor Deposition of Silicon," Appl. Phys. Lett., vol. 35, No. 8, Oct. 1979, pp. 626-627.

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