Method for manufacturing a semiconductor device having planarize

Details Method for manufacturing a semiconductor device having planarize Method for manufacturing a semiconductor device having planarize

1995-03-02

1996-07-09

Quach, T. N.

Fishing, trapping, and vermin destroying

437192, 437175, H01L 21283

Patent

active

055344615

ABSTRACT:
A first contact hole and a second contact hole are formed in an insulating film on the surface of a substrate, and thereafter a blanket tungsten (W) layer is deposited on the substrate surface, with or without a barrier metal layer being interposed therebetween. The first contact hole has a small size a so that the W layer can fully bury the first contact hole, whereas the second contact hole has a large size b over a size c where a<c<b so that a desired wiring layer coverage ratio is attained. The deposited W layer is etched back while leaving the W layer in the first contact hole and a tapered W layer in the second contact hole. A wiring layer such as Al alloy is deposited on the substrate surface. The unnecessary wiring layer and barrier metal layer are patterned to form a wiring pattern. Wiring layers having a good burying state and a good coverage state can be obtained. A yield of manufacturing wiring layers can be improved.

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Semiconductor World, Nov., 1990, pp. 216-219.

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