Fishing – trapping – and vermin destroying
Patent
1992-03-03
1994-09-13
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 48, 437 52, 437 60, 437919, 148DIG14, H01L 21265
Patent
active
053468341
ABSTRACT:
An improved method for manufacturing an insulated gate field effect transistor is provided. As a first step, a silicon oxide film is grown on a silicon substrate, and a first silicon nitride film is deposited thereon. The first silicon nitrite film, the silicon oxide film and the silicon substrate are then etched using a resist pattern as a mask to form a silicon island which includes at least a part of the silicon substrate. A second silicon oxide film is then grown on the surface of the silicon substrate exposed by the second step, as well as on the surface of the silicon island, and a second silicon nitrite film is deposited thereon. The second silicon nitrite film is then etched to leave a portion of the second silicon nitrite film deposited on a side wall of the silicon island. After this, a third silicon oxide film is grown by thermal oxidation of the surface of the silicon substrate to electrically separate the silicon island from the silicon substrate. Next a gate electrode is formed on silicon island, followed by forming source and drain regions in the silicon island employing the gate electrode as a mask.
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Hiraiwa Atsushi
Hisamoto Dai
Kaga Toru
Kimura Shin'ichiro
Moniwa Masahiro
Hearn Brian E.
Hitachi , Ltd.
Nguyen Tuan
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