Fishing – trapping – and vermin destroying
Patent
1991-08-26
1992-09-08
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 62, 437 69, 437 89, 437913, 437915, 148DIG53, 148DIG150, H01L 21265
Patent
active
051457962
ABSTRACT:
A method for manufacturing a semiconductor apparatus, providing steps of (i) laminating a first polysilicon layer on the whole surface of a semiconductor substrate through a first oxide layer, (ii) removing the first polysilicon layer and first oxide layer in an element separation region so as to form a trench therein and to treat the residual first polysilicon layer and first oxide layer as a bottom gate electrode and an insulating film respectively, (iii) forming a monocrystalline silicon layer by epitaxial growth on the whole surface of the semiconductor substrate including the trenches, (iv) removing the monocrystalline silicon layer in the element separation region, laminating a second oxide layer on the whole surface of the semiconductor substrate including the removing portion, and making the second oxide layer remain as an element separation film in only the element separation region, and (v) forming a gate oxide film and a top gate electrode on the residual monocrystalline silicon film, and forming a source/drain region on the residual monocrystalline silicon film.
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"Thin Film Effects of Double-Gate Polysilicon MOSFET", T. Hashimoto et al. Extended Abstracts of the 22nd (1990 International) Conference on Solid State Devices and Materials, Sendai, 1990, pp. 393-396.
Adan Alberto
Horita Masayoshi
Hearn Brian E.
Sharp Kabushiki Kaisha
Trinh Michael
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