Method for manufacturing a self-aligned contact in a grooved sem

Coating processes – Electrical product produced – Condenser or capacitor

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156643, 156647, 156653, 357 55, 427 91, 427 93, 427 94, 430314, 430318, 430329, H01L 2128

Patent

active

042685370

ABSTRACT:
An apertured mask is formed on a major surface of a semiconductor substrate, and a groove is generated in the semiconductor in an area exposed by the aperture. A layer of electrode material is then formed on the groove surface, the layer extending beyond the groove and onto the mask. The mask is then stripped, and those portions of the electrode material extending beyond the groove are removed.

REFERENCES:
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patent: 3975925 (1976-08-01), Schwabe
patent: 4003126 (1977-01-01), Holmes et al.
patent: 4065783 (1977-12-01), Ouyang
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patent: 4145703 (1979-03-01), Blanchard
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patent: 4173765 (1979-11-01), Heald et al.
patent: 4194283 (1980-03-01), Hoffman
patent: 4206005 (1980-06-01), Yeh et al.
Chang et al., "Fabrication of V-MOS or U-MOS . . . " IBM TDB, vol. 22, No. 7, pp. 2768-2771, Dec. 1979.

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