Fishing – trapping – and vermin destroying
Patent
1994-06-28
1995-01-24
Thomas, Tom
Fishing, trapping, and vermin destroying
437952, 437985, H01L 21266
Patent
active
053842723
ABSTRACT:
The invention provides a method for manufacturing a non-volatile, virtual ground memory element. The method includes the steps of depositing a first polysilicon layer on gate oxide on a silicon substrate, depositing or growing a first oxide layer, depositing a barrier nitride layer and patterning the first polysilicon layer, the first oxide layer and the barrier nitride layer to form a floating gate. The method further includes the steps of doping a region of the silicon substrate adjacent the floating gate to form a bit line region and oxidizing the bit line region in a wet ambient. The method further includes the use of a spacer nitride or spacer oxide
itride layer to protect the edge of the floating gate during oxidation and to reduce dopant diffusion under the gate. The method further includes the steps of stripping the barrier nitride layer, depositing a second polysilicon layer and patterning the second polysilicon layer to form a control gate.
REFERENCES:
patent: 4852062 (1989-07-01), Baker et al.
patent: 5120670 (1992-06-01), Bergmont
patent: 5246874 (1993-09-01), Bergemont
patent: 5256584 (1993-10-01), Hartmann
Ibok Effiong E.
Moore Bradley T.
Advanced Micro Devices , Inc.
Chaudhari Chandra
Thomas Tom
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