Method for manufacturing a low-impedance, planar metallization c

Details Method for manufacturing a low-impedance, planar metallization c Method for manufacturing a low-impedance, planar metallization c

1988-08-01

1990-03-20

James, Andrew J.

357 67, H01L 2348

Patent

active

049105809

ABSTRACT:
To improve the planarization and reliability of low-impedance aluminum metallizations, a substrate provided with a titanium/titanium nitride double layer diffusion barrier layer and having a contact hole is provided or, respectively, filled with an aluminum/silicon alloy sandwich structure composed of a sequence of n aluminum/silicon layers having n-1 intermediate layers of titanium applied thereon, whereby the layer thickness ratio of the titanium intermediate layers to the overall layer thickness d of the metallization behaves like 1:10. The multisandwich metallization manufactured in this way is used in VLSI circuits and, given the same specific resistance achieves a life expectancy that is 10 through 100 times higher than that of the aluminum/silicon/titanium alloys that are otherwise standard.

REFERENCES:
patent: 4527184 (1985-07-01), Fischer

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