Method for manufacturing a housing for a chip with a...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S456000, C438S125000

Reexamination Certificate

active

07011986

ABSTRACT:
In a housing manufacturing method a base is provided with first contact elements with a photolithographically patternable layer that is patterned for exposing the contact elements. A chip with a micromechanical structure lying between second contact elements at the chip is provided with a photolithographically patternable layer which is patterned in order to provide a recess in the area of the micromechanical structure and in the area of the second contact elements. After joining the base and the chip the base is removed by etching.

REFERENCES:
patent: 5561085 (1996-10-01), Gorowitz et al.
patent: 5610431 (1997-03-01), Martin
patent: 5729185 (1998-03-01), Johnson et al.
patent: 5757072 (1998-05-01), Gorowitz et al.
patent: 5920142 (1999-07-01), Onishi et al.
patent: 6154940 (2000-12-01), Onishi et al.
patent: 6338284 (2002-01-01), Najafi et al.
patent: 6559487 (2003-05-01), Kang et al.
patent: 6767757 (2004-07-01), Kang et al.
patent: 6808954 (2004-10-01), Ma et al.
patent: 2001/0001293 (2001-05-01), Gotoh, et al.
patent: 2001/0011857 (2001-08-01), Morishima
patent: 2003/0012884 (2003-01-01), Pahl, et al.
patent: 2003/0132493 (2003-07-01), Kang, et al.
patent: 100 06 446 (2001-08-01), None
patent: 0 718 885 (1996-06-01), None
patent: 0 794 616 (1997-09-01), None
patent: 0 805 552 (1997-11-01), None
patent: 1 096 259 (2001-05-01), None
patent: 06-005608 (1994-01-01), None
patent: 2001244785 (2001-09-01), None
Tilmans, H.A.C., et al., “The Indent Reflow Sealing (IRS) Technique —A Method for the Fabrication of Sealed Cavities for MEMS Devices” Journal of Microelectromechanical Systems, 2000 IEEE, vol. 9, No. 2, Jun. 2000, pp. 206-217.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for manufacturing a housing for a chip with a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing a housing for a chip with a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a housing for a chip with a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3530979

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.