Method for manufacturing a heterostructure transistor having a g

Fishing – trapping – and vermin destroying

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148DIG7, 148DIG41, 148DIG72, 437 31, 437 95, 437107, 437939, 437946, H01L 2120

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050473654

ABSTRACT:
A heterostructure bipolar transistor is formed by a process of steps of holding an N-type gallium arsenide body using as an emitter region in a high vacuum of 10.sup.-9 torr to 10.sup.-13 torr at a first temperature of 400.degree. C. to 1,000.degree. C. where arsenic on a surface of the gallium arsenide body drifts away, lowering the first temperature to a second temperature of 300.degree. C. to 400.degree. C. to start a molecular beam epitaxial growth of a germanium, and forming an N-type germanium layer using as a collector region.

REFERENCES:
patent: 4188710 (1980-02-01), Davey et al.
patent: 4261771 (1981-04-01), Dingle et al.
patent: 4398963 (1983-08-01), Stall et al.
patent: 4716445 (1987-12-01), Sone
Grant et al., ". . . Ge-GaAs Heterojunction Interfaces," J. Vac. Sci. Techol., 15(4), Jul./Aug. 1978, pp. 1451-1455.
Murschall et al., "Low-Energy . . . with Ge:GaAs(110) Heterostructures," Solid State Comm., vol. 42, No. 11, 1982, pp. 787-791.
"Active Area Limitation of Ge/GaAs Heterojunctions by Means of B Ion Implantation", F. Ishizuka et al., J. Appl. Phys 59(2), 15 Jan. 1986, pp. 495-498.

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