Method for manufacturing a fully self-adjusted bipolar transisto

Details Method for manufacturing a fully self-adjusted bipolar transisto Method for manufacturing a fully self-adjusted bipolar transisto

1988-03-21

1989-05-09

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 33, 437 67, 437193, 148DIG10, 148DIG11, 148DIG117, 357 34, 357 59, 156653, H01L 21265

Patent

active

048290157

ABSTRACT:
A method for manufacturing a fully self-adjustsed bipolar transistor in which the emitter zone, the base zone, and the collector zone are aligned vertically in a silicon substrate; the collector is connected by means of a deeply extending terminal in the substrate, the inactive base zone is embedded in an insulating trench to separate the inactive base zone from the collector; the emitter terminal zone is composed of doped polycrystalline silicon and is separated from the inactive base zone by a silicon oxide layer. A fully self-adjusted bipolar transistor is produced wherein the emitter is self-adjusted relative to the base and the base is self-adjusted relative to the insulation. The number of method steps involving critical mask usage is low, and parasitic regions are minimized so that the switching speed of the component is increased. The transistor is used for integrated bipolar transistor circuits having high switching speeds.

REFERENCES:
patent: T104803 (1984-11-01), Horng
patent: 4378630 (1983-04-01), Horng
patent: 4392149 (1983-07-01), Horng
patent: 4745087 (1988-05-01), Iranmanesh
Siemens Forsch-u. Entwickl.-Ber., vol. 13 (1984), No. 5, "Self-Aligned Bipolar Technology-New Chances for Very-High-Speed Digital Integrated Circuits", by A. W. Wieder, pp. 246-252.
IEDM Techn. Dig. 1980, pp. 58-60, "A Symmetrical Bipolar Structure", by D. D. Tang et al.
IEEE Transactions on Electron Devices, vol. ED-29, No. 4, Apr., 1982, "Self-Aligned Transistor with Sidewall Base Electrode", by Tohru Nakamura et al., pp. 596-600.

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