Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2001-05-22
2003-07-29
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S399000, C438S240000
Reexamination Certificate
active
06599806
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a capacitor of a semiconductor device including a dielectric film of high dielectric constant (a high dielectric film) and a method for manufacturing the same.
2. Description of the Related Art
As an integration density of a semiconductor device such as a dynamic random access memory (DRAM) and a ferro-electric RAM (FRAM) increases, a high dielectric constant material such as PbZrTiO
3
(PZT) or BaSrTiO
3
(BST) is required for the dielectric film of a capacitor. Metals of the platinum group and the oxides thereof are mainly used for the conductive film forming a lower electrode or an upper electrode in a capacitor using the high dielectric film. Here, a dry etching for patterning the platinum group metals and the oxide thereof used for the conductive film of the capacitor is difficult. Also, since the platinum group and the oxide thereof reacts with a polysilicon film used as a contact plug, a diffusion barrier layer for preventing the reaction is required between the conductive film and the polysilicon film.
FIG. 1
is a sectional view for describing the capacitor of the semiconductor device according to a conventional technology.
To be specific, an interlayer dielectric film
3
having a contact hole is formed on a semiconductor substrate
1
. A contact plug
5
comprised of the polysilicon film is buried in the contact hole. A diffusion barrier layer
7
connected to the contact plug
5
and comprised of Ta is formed. A first conductive film
9
used as the lower electrode of the capacitor and comprised of Pt is formed on the diffusion barrier layer
7
. A high dielectric film
11
is formed on the overall surface of the semiconductor substrate
1
on which the first conductive material
9
is formed. A second conductive material
13
used as an upper electrode is formed on the overall surface of the semiconductor substrate
1
on which the high dielectric film
11
is formed.
In a conventional capacitor shown in
FIG. 1
, the diffusion barrier layer
7
is formed in order to prevent the reaction between the platinum film of the first conductive film
9
and the contact plug
5
. In the conventional capacitor shown in
FIG. 1
, since the side surfaces of the platinum film of the first conductive film
9
and the diffusion barrier layer
7
are exposed during the deposition of the dielectric film
11
and in a subsequent heat treatment process, the diffusion barrier layer
7
is oxidized and thus becoming Ta
2
O
5
which is a non-conductor. Accordingly, the contact resistance the conductive film
9
increases and the first film conductive film
9
cannot be used. Also, in the conventional capacitor shown in
FIG. 1
, leakage current increases since the diffusion barrier layer
7
reacts with the high dielectric film
11
.
A method of recessing the contact plug is proposed in order to solve the above problem, which is described with reference to
FIGS. 2 and 3
.
FIGS. 2 and 3
are sectional views showing the capacitors of the semiconductor device according to another conventional technology.
Referring to
FIGS. 2 and 3
, an interlayer dielectric film
23
having a contact hole is formed on a semiconductor substrate
21
. A silicon plug
25
and a diffusion barrier layer
27
comprised of Ta film are sequentially buried in the contact hole. A first conductive film
29
used as the lower electrode of the capacitor and comprised of Pt film is formed on the diffusion barrier layer
27
.
In the conventional capacitor shown in
FIG. 2
, the diffusion barrier layer
27
is formed in a position different from that of the diffusion barrier layer
7
of FIG.
1
. Namely, since the diffusion barrier layer
27
is buried in the contact hole, it is possible to prevent the side surface of the diffusion barrier layer
27
from being exposed.
However, in the conventional capacitor shown in
FIG. 2
, the diffusion path of an oxygen atom is short, and thus the diffusion barrier layer
27
may be oxidized during a subsequent process of forming the high dielectric film.
Furthermore, as shown in
FIG. 3
, when a misalignment occurs during patterning for forming the first conductive film
29
, the diffusion barrier layer
27
is exposed and oxidized during the subsequent profess of depositing the high dielectric film and becomes a nonconductor. When the diffusion barrier layer
27
becomes nonconductive, the contact resistance of the conductive film
29
is increased and the production yield of the semiconductor device is deteriorated.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method for manufacturing a capacitor for a semiconductor device is taught. The method comprises forming a first interlayer dielectric film pattern on a semiconductor substrate, with the interlayer dielectric film pattern having a first contact hole to expose a portion of the semiconductor substrate through the first contact hole. A contact plug is formed to fill the first contact hole and connect to the semiconductor substrate. A diffusion barrier layer pattern is formed on the contact plug, and a first conductive film pattern is formed on the diffusion layer pattern. Next a second interlayer dielectric film pattern is formed on the first dielectric film pattern and the first conductive film pattern. The second interlayer dielectric film pattern includes a second contact hole that exposes a top surface of the first conductive film pattern. A second conductive film pattern is formed on the first conductive film pattern which is exposed through the second contact hole. A dielectric film is formed on the second conductive film pattern and a third conductive film is formed on the dielectric film.
REFERENCES:
patent: 5392189 (1995-02-01), Fazan et al.
patent: 5701647 (1997-12-01), Saenger et al.
patent: 5786259 (1998-07-01), Kang
patent: 5892254 (1999-04-01), Park et al.
patent: 6001660 (1999-12-01), Park et al.
patent: 6130124 (2000-10-01), Lee
patent: 6177351 (2001-01-01), Beratan et al.
patent: 6180974 (2002-01-01), Okutoh et al.
Harness & Dickey & Pierce P.L.C.
Trinh Michael
LandOfFree
Method for manufacturing a capacitor of a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing a capacitor of a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a capacitor of a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3019760