Method for making transistor structures

Details Method for making transistor structures Method for making transistor structures

1975-12-03

1977-07-26

Ozaki, G.

Metal treatment

Compositions

Heat treating

148187, H01L 2126

Patent

active

040381072

ABSTRACT:
An extremely short channel Field Effect Transistor (FET) is made by making a first ion implant through a polysilicon mask aperture, converting the surface of the polysilicon into SiO.sub.2 to constrict the aperture size and then making a second ion implant of the opposite type impurity through the constricted aperture. The SiO.sub.2 growth effectively moves the edge of the mask by a small controlled distance. This permits a small controlled spacing between the two ion implants, which is used for defining an extremely short FET channel. Alternatively, a bipolar transistor with a narrow base zone can be made by analogous processing.

REFERENCES:
patent: 3372067 (1968-03-01), Schafer
patent: 3406049 (1968-10-01), Marinace
patent: 3456168 (1969-07-01), Tatom
patent: 3558366 (1971-01-01), Lepselter
patent: 3719535 (1973-03-01), Zoroglu
patent: 3765961 (1973-10-01), Mar
patent: 3947299 (1976-03-01), Weijland et al.
Rogers et al., "An Experimental and Theoretrical Analysis--etc." IEE J. & Sol. State Circ., vol. SC-10, No. 5 pp. 322-331, 10/75.

Affiliated with

Also associated with

Rating

Method for making transistor structures does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for making transistor structures, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for making transistor structures will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-724259