Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1978-04-14
1980-05-27
Tufariello, T. M.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
204 15, 427 92, C23C 300, C25D 502
Patent
active
042050995
ABSTRACT:
A method is described for making terminal pads, and more particularly solderable bump terminals on a plurality of semiconductor devices formed in a silicon wafer. Two spaced aluminum layers have electrical connection to the P-type region and the N-type region, respectively, of a PN junction of each device. A permanent protective glass layer is deposited over the active face of the wafer, having holes opened over the terminal pads. The wafer is covered with a temporary insulative masking layer except over terminal pad portions of the two aluminum layers, respectively. The wafer is submersed in a zinc plating solution and subsequently in a nickel plating solution to form a nickel bump on the terminal pad portions. A dark environment is provided about the PN junctions to avoid deplating aluminum from some of the aluminum pads due to photo-electric currents in the immersion solution. The masking layer prevents formation of unwanted spurious nickel bumps through cracks in the glass layer during the plating step and further reduces stray current paths to other regions of the wafer.
REFERENCES:
patent: 3096262 (1963-07-01), Shockley
patent: 3495324 (1970-02-01), Guthrie et al.
patent: 3669734 (1972-06-01), Jacob et al.
patent: 3760238 (1973-09-01), Hamer et al.
IBM Technical Disclosure Bulletin, vol. 16, No. 7, Dec. 1973 p. 2296.
Jones Leith
McGrath N. Christian
Sprague Electric Company
Tufariello T. M.
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