Method for making single transistor non-volatile electrically al

Details Method for making single transistor non-volatile electrically al Method for making single transistor non-volatile electrically al

1993-08-02

1994-12-06

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437978, 437235, 437243, 257321, H01L 21285

Patent

active

053710282

ABSTRACT:
An improved electrically programmable and erasable memory device having a plurality of addressable single transistor cells, each transistor having spaced source and drain regions, a floating gate and a control gate. The improvement is a new tunneling insulator layer structure between the floating gate and the control gate. The improved tunneling layer is a dual layer formed of a outer silicon oxide layer and an inner silicon oxynitride layer.

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patent: 5198392 (1993-03-01), Fukuda et al.
patent: 5225361 (1993-07-01), Kakiuchi et al.
Wolf and Tauber, "Silicon Processing for the VLSI Era, vol. I: Process Technology", pp. 211-215, 1986.

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