Method for making silicon on sapphire transistor utilizing prede

Details Method for making silicon on sapphire transistor utilizing prede Method for making silicon on sapphire transistor utilizing prede

1978-08-02

1979-10-02

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29571, 148174, 148187, 357 4, 357 23, 357 49, H01L 2186, H01L 2188, H01L 2972

Patent

active

041697464

ABSTRACT:
The integrated circuit is manufactured upside down relative to conventional silicon-on-sapphire (SOS) processing techniques for manufacturing field effect transistors. First a conductive pattern, typically of a refractory metal, is deposited and defined on an insulating substrate, such as sapphire, and then silicon transistors are formed over the conductive pattern. Using the process, a masking step, namely the contact definition mask, used in conventional SOS manufacture, is eliminated.

REFERENCES:
patent: 3191061 (1965-06-01), Weimer
patent: 3258663 (1966-06-01), Weimer
patent: 3304469 (1967-02-01), Weimer
patent: 3385731 (1968-05-01), Weimer
patent: 3405331 (1968-10-01), Skalski et al.
patent: 3460240 (1969-08-01), Tarneja et al.
patent: 3616527 (1971-11-01), Janning
patent: 3872492 (1975-03-01), Robbins
Weimer, P. K., "Integrated Thin-Film Circuits--Elements", Trans. Metall. Soc. of AIME, vol. 236, Mar. 1966, pp. 250-256.

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