Method for making shallow trench marks

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature

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438462, H01L 2176

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active

059638168

ABSTRACT:
The separate formation of alignment marks and manufacturing a semiconductor device comprising photolithographically printing circuit patterns is avoided by utilizing trenches formed when etching to form shallow isolation trenches, thereby increasing manufacturing throughput and reducing costs. Embodiments include utilizing alignment trenches having a depth of about 2,400.ANG. to less than about 4,000.ANG., e.g., 3,000.ANG., formed substantially simultaneously with forming isolation trenches having substantially the same depth as the alignment trenches.

REFERENCES:
patent: 5470782 (1995-11-01), Schwalke et al.

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