Method for making semiconductor device

Metal working – Method of mechanical manufacture – Assembling or joining

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29576B, 29571, 148 15, 148188, 357 34, H01L 21225, H01L 21265

Patent

active

045369500

ABSTRACT:
In making a vertical bipolar transistors, after forming by diffusion process a region to become inactive base region an oxide film is selectively formed on the region, thereafter an ion implantation is carried out to produce regions which become the active base region and emitter region by using the oxide film; thereby such a configuration is formed so that defect part (108) induced at the time of the ion implantation is confined in the emitter region, thereby minimizing the leakage current at the PN junction, and hence assuring production of high performance and high reliability semiconductor devices; further, a high integration is attained by adopting self-alignment in forming emitter contact.

REFERENCES:
patent: 4252582 (1981-02-01), Anantha et al.
patent: 4266985 (1981-05-01), Ito et al.
patent: 4347654 (1982-09-01), Allen et al.
patent: 4416055 (1983-11-01), McCarthy et al.
Ning et al: "Self-Aligned Bipolar Transistors for High-Performance and Low-Power Delay VLSI," IEEE Transactions on Electron Devices, vol. ED-28, No. 9, Sep. 1981, pp. 1010-1013.
Fujita et al: "Flat Emitter Transistor with Self-Aligned Base," Proceedings of the 12th Conf. on Solid State Devices, Tokyo, 1980, Jap. J. of Appl. Physics, vol. 20, (1981), Supp. 20-1, pp. 149-153.

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